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Broadcom Corporation
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San Jose
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CA
Tuesday, July 15, 2008
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Description:
Broadcom is developing solutions supporting the next generation of 3G and 4G high-speed mobile technologies. As part of the CellAirity™ Mobile Platform, Broadcom offers a family of HSDPA (High-Speed Downlink Packet Access), WCDMA (Wideband Code Division Multiple-Access), EDGE (Enhanced Data Rates for GSM Evolution), GPRS (General Packet Radio Services) and GSM (Global System for Mobile Communication) baseband processors for use in cellular handsets, PC cards and other wireless-enabled consumer electronics.
In this role, you will work with a dedicated team of analog and mix signal designers to develop power management IC chips for cell phones, Personal Navigation devices, and in general battery driven hand held devices. In addition, you will be responsible for the verification plan and execution of it including static timing analysis.
Job Requirements : -Typically requires a BS degree and 9+ years of experience in mix signal and/or ASIC design, or an MS degree and 6+ years of experience or a PhD and 3+ years of experience.
-Strong background in developing block level IP's and chip level integration.
-Must be fluent in hardware description languages such as Verilog-D and Verilog-A , synthesis tools such as Synopsys or BuildGates, knowledge of VHDL and assembly language and converting a high level design into FPGA is a plus.
-Ability to get target specification/usage model and come up with design specification and implement the design.
-Knowledge of various communication buses like I2C, SPI, SMBUS, and MIPI is a plus.
-Knowledge of DC-DC converters such as linear regulators, SMPS (switching mode power supply), battery charging, power/energy management is a plus.
City : San Jose
State : California
Country : United States